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Updated date
decoder.sv: add checks for some B instructions (fix #2276)
!2282
· created
Jun 21, 2024
by
Eclipse Webmaster
Merged
2
updated
Jun 21, 2024
superscalar: allow speculative instructions
!2278
· created
Jun 20, 2024
by
Eclipse Webmaster
Merged
2
updated
Jun 20, 2024
Fix reserved value in MPP
!2035
· created
Apr 12, 2024
by
Eclipse Webmaster
Merged
6
updated
Jun 20, 2024
Use correct fault type for VLSU overflow
!2273
· created
Jun 19, 2024
by
Eclipse Webmaster
Merged
2
updated
Jun 19, 2024
doc: clarify mtval register description when not enabled
!2271
· created
Jun 19, 2024
by
Eclipse Webmaster
Merged
1
updated
Jun 19, 2024
[riscv-config] Update riscv-config tool, CV32A65X specs and the rendering of CSRs.
!2270
· created
Jun 19, 2024
by
Eclipse Webmaster
Merged
1
updated
Jun 19, 2024
Implement simple uart-based updater for the bootrom
!2267
· created
Jun 18, 2024
by
Eclipse Webmaster
Merged
5
updated
Jun 19, 2024
Add in Github's CI a 64-bit configuration of the CVA6 using the HPDcache and restore WB cache test
!2114
· created
May 15, 2024
by
Eclipse Webmaster
Merged
36
updated
Jun 18, 2024
Update submodule core/cache_subsystem/hpdcache
!2265
· created
Jun 17, 2024
by
Eclipse Webmaster
Merged
11
updated
Jun 18, 2024
Bump CVV 2465 and adapt cva6pkg
!2263
· created
Jun 14, 2024
by
Eclipse Webmaster
Merged
6
updated
Jun 17, 2024
Mmu design document
!2117
· created
May 15, 2024
by
Eclipse Webmaster
Merged
12
updated
Jun 17, 2024
Update VCS compile flow to 2-step flow in testharness and update UART to version 0.2.1
!2196
· created
Jun 05, 2024
by
Eclipse Webmaster
Merged
15
updated
Jun 17, 2024
docs: move riscv-isa-manual outside of cv32a65x documentation
!2264
· created
Jun 14, 2024
by
Eclipse Webmaster
Merged
2
updated
Jun 16, 2024
Make AXI transactions modifiable
!948
· created
Sep 02, 2022
by
Eclipse Webmaster
Merged
19
updated
Jun 14, 2024
Fix CSR chapter insertion and rename Design Doc names
!2262
· created
Jun 14, 2024
by
Eclipse Webmaster
Merged
2
updated
Jun 14, 2024
[Xcelium flow] Fix initialization of memory array for simulation
!2259
· created
Jun 14, 2024
by
Eclipse Webmaster
Merged
2
updated
Jun 14, 2024
[Xcelium flow] xrun testharness rules
!2223
· created
Jun 10, 2024
by
Eclipse Webmaster
Merged
18
updated
Jun 14, 2024
CSR verification : modify CSR env verif based on new specification
!2261
· created
Jun 14, 2024
by
Eclipse Webmaster
Merged
2
updated
Jun 14, 2024
Prepare for LLVM
!2251
· created
Jun 13, 2024
by
Eclipse Webmaster
Merged
4
updated
Jun 14, 2024
Execute lint job when RTL is modified
!2255
· created
Jun 13, 2024
by
Eclipse Webmaster
Merged
6
updated
Jun 14, 2024
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