Add in Github's CI a 64-bit configuration of the CVA6 using the HPDcache and restore WB cache test

Created by: cfuguet

This PR adds to the Github's CI a tests with the cv64a6_imafdc_sv39_hpdcache configuration.

This configuration uses 64-bit variant of the CVA6 with "deep" structures related to the data cache:

• Up to 8 inflight loads to the cache (and thus up to 8 miss requests to the memory)
• Up to 8 inflight write requests to the memory

It also restores the testing of the WB cache into the CI.

FIXME: In addition, this PR comments out some coverpoints in the AXI agent because of illegal bins that are not compatible with the HPDcache. These coverpoints expect that the cache uses a very small subset of IDs in AXI transactions, however the HPDcache is able to use a larger subset as it can issue multiple inflight requests to the memory (both reads and writes).

I pushed a first proposal for the Github's CI. It runs the following configurations:

cv64a6_imafdc_sv39_hpdcache
cv64a6_imafdc_sv39_wb
cv64a6_imafdc_sv39
cv32a65x

However, the number of tests is limited. The selected tests allow to test arithmetic, memory and branch/jump instructions and a complete but very simple application (hello_world). In addition, the riscv-arch-test suite is executed with the cv64a6_imafdc_sv39_hpdcache and cv32a65x configurations. In the case of 64 bits configurations, I selected the unitary tests that enable the MMU.

The tests for a given configuration are run sequentially but all configurations are run in parallel to reduce the overall latency.

For 64 bits configurations:

riscv-arch-test (only in the cv64a6_imafdc_sv39_hpdcache configuration)
rv64ui-v-add
rv64ui-v-ld
rv64ui-v-sd
rv64ui-v-beq
rv64ui-v-jal
hello_world.c

For 32 bits configurations:

riscv-arch-test
rv32ui-p-add
rv32ui-p-lw
rv32ui-p-sw
rv32ui-p-beq
rv32ui-p-jal
hello_world.c