Explore projects
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Paolo Bono / NFVCL-NG
GNU General Public License v3.0 or laterUpdated -
Eclipse Research Labs / NEPHELE Project / SMO
MIT LicenseUpdated -
Eclipse Projects / Eclipse Ease / Ease
Eclipse Public License 2.0Updated -
Eclipse Projects / Eclipse Oniro Compliance Toolchain / toolchain / tinfoilhat
GNU General Public License v2.0 onlyTools to extract and aggregate metadata and sources from multiple yocto builds
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Houssem ROUIS / aidge
Eclipse Public License 2.0Updated -
IP compliance toolchain and audit process documentation
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Eclipse Research Labs / NEPHELE Project / VO-WoT
MIT LicenseUpdated -
Eclipse Projects / papyrus / org.eclipse.papyrus-designer
Eclipse Public License 2.0Papyrus for Designer
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OpenHW Group / backup-20240512 / cva5
Apache License 2.0The CORE-V CVA5 is an Application class 5-stage RISC-V CPU specifically targetting FPGA implementations.
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OpenHW Group / backup-20240512 / corev-qemu
GNU Lesser General Public License v2.1 onlyOfficial QEMU mirror. Please see http://wiki.qemu.org/Contribute/SubmitAPatch for how to submit changes to QEMU. Pull Requests are ignored. Please only use release tarballs from the QEMU website.
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OpenHW Group / backup-20240512 / cv32e41p
Apache License 2.04 stage, in-order, secure RISC-V core based on the CV32E40P with Zfinx and Zce ISA extentions
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OpenHW Group / backup-20240512 / cv32e20-dv
Apache License 2.0Updated -
OpenHW Group / backup-20240512 / cvfpu
Apache License 2.0Parametric floating-point unit with support for standard RISC-V formats and operations as well as transprecision formats.
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OpenHW Group / backup-20240512 / cve2
Apache License 2.0The CORE-V CVE2 is a small 32 bit RISC-V CPU core (RV32IMC/EMC) with a two stage pipeline, based on the original zero-riscy work from ETH Zurich and Ibex work from lowRISC.
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