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Aidge's reference C++ export module, required for generating standalone C++ static compute graph

Aidge's TensorRT export module. It act as a thin wrapper around NVidia's tools with easy custom operator insertion

Functional verification project for the CORE-V family of RISC-V cores.

The CORE-V CVE2 is a small 32 bit RISC-V CPU core (RV32IMC/EMC) with a two stage pipeline, based on the original zero-riscy work from ETH Zurich and Ibex work from lowRISC.

RTL sources of the High-Performance L1 Dcache (HPDcache) for OpenHW CV cores

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