32 bits WB cache

Created by: cyprienh

This PR adapts the WB cache so that it works with the 32 bits versions of CVA6. It was tested using the updated TB from PR #2151 and should also solve the issue #2006. It works by aligning the data to and from the AXI bus on the 64 bits of the bus (lower or upper 32 bits depending on the address).