Hardwire the reserved bits of the PMPCFG CSR to 0 (!1368) · Merge requests · OpenHW Group / backup-20241120 / cva6

Eclipse Webmaster requested to merge github/fork/Moschn/pmpcfg-csr-fix into master Sep 07, 2023

Created by: Moschn

Currently, the PMPCFG CSRs are implemented as a full 8-bit register. However, the bits 5 and 6 are reserved according to the privilege spec. This patch hardwires these two bits to 0. This should also fix the discrepancy between spike and CVA6 for the PMPCFG CSRs (#1346 ). It might also lead to lower area/less luts used.

Hardwire the reserved bits of the PMPCFG CSR to 0

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