Single step fix (wb_valid)
Created by: silabs-oysteink
Single step would be signalled as pending whenever an instruction reached WB stage.
This could cause LSU instructions with late rvalid to finish after the controller entered debug mode. This fix waits until the actual wb_valid to signal a pending single step.
Fixes issue #187 (closed)
Signed-off-by: Oystein Knauserud Oystein.Knauserud@silabs.com