RVFI may set dpc before entering debug handler during single-step mode

Created by: strichmo

Component

Component:RVFI **Component:Doc **: For issues in the Documentation (e.g. for User Manual or README.md files) Component:Other: For any other issues

Steps to Reproduce

Please provide:

1. e422fa37d0f5c50e526dbfddb01f927c7d1fd513 (cv32e40x/dev branch)
2. Using Xcelium 21.07.a001

%  makeuvmt test TEST=debug_test WAVES=1 ADV_DEBUG=1 SEED=1680260209 CV_CORE=cv32e40x

The RVFI will report the dpc CSR updating to the "next" instruction during the instruciton retirement of the stepped instruction (0xca94). However the ISS will always wait until the first instruction retirement in the debug handler before updating dpc to the next instruction (0xca98). This behavior is intermittent-not all single-stepped instructions show this behavior on RVFI.