Explore projects
-
Eclipse Foundation / IT / Websites / accounts.eclipse.org
Eclipse Public License 2.0Updated -
Eclipse Projects / aidge / aidge
Eclipse Public License 2.0Aidge meta-repository, which includes the main modules of the Aidge framework as Git submodules, plus the documentation and tutorials.
Updated -
Eclipse Projects / aidge / aidge_backend_cpu
Eclipse Public License 2.0Aidge's reference CPU backend, written in C++, not optimized for performances
Updated -
Eclipse Projects / aidge / aidge_backend_cuda
Eclipse Public License 2.0Aidge's CUDA backend, written in C++/CUDA and using NVidia's CuDNN and CuBLAS libraries. Required for training and inference on NVidia's GPUs
Updated -
Eclipse Projects / aidge / aidge_core
Eclipse Public License 2.0Aidge's core module, written in C++, always required
Updated -
Eclipse Projects / aidge / aidge_onnx
Eclipse Public License 2.0Aidge's ONNX import/export module, written in Python, required for ONNX interoperability
Updated -
Eclipse Projects / xfsc / Personal Credential Manager / app
Apache License 2.0Updated -
Eclipse Projects / AsciiDoc Language / AsciiDoc Language
Eclipse Public License 2.0This project maintains the official specification, Technology Compatiblity Kit (TCK), and documentation for the AsciiDoc language and its APIs. The AsciiDoc Language Specification describes the syntax, grammar, and APIs for the AsciiDoc language.
Updated -
Eclipse Projects / xfsc / AuthenticationAuthorization
Apache License 2.0Updated -
Eclipse Foundation / IT / Websites / automotive-oss.org
Eclipse Public License 2.0Updated -
Eclipse Research Labs / CODECO Project / Metadata Manager - MDM / Connectors
Apache License 2.0Updated -
Functional verification project for the CORE-V family of RISC-V cores.
Updated -
RISC-V eXtension interface that provides a generalized framework suitable to implement custom coprocessors and ISA extensions
Updated -
OpenHW Group / backup-20240317 / cv32e20-dv
Apache License 2.0Updated -
OpenHW Group / backup-20240317 / cv32e40p
Apache License 2.0CV32E40P is an in-order 4-stage RISC-V RV32IMFCXpulp CPU based on RI5CY from PULP-Platform
Updated -
CV32E40X Design-Verification environment
Updated -
OpenHW Group / backup-20240317 / cva5
Apache License 2.0The CORE-V CVA5 is an Application class 5-stage RISC-V CPU specifically targetting FPGA implementations.
Updated