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Eclipse Foundation / IT / APIs / GeoIP API
Apache License 2.0Updated -
Eclipse Projects / AsciiDoc Language / AsciiDoc Language
Eclipse Public License 2.0This project maintains the official specification, Technology Compatiblity Kit (TCK), and documentation for the AsciiDoc language and its APIs. The AsciiDoc Language Specification describes the syntax, grammar, and APIs for the AsciiDoc language.
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OpenHW Group / backup-20240421 / cva5
Apache License 2.0The CORE-V CVA5 is an Application class 5-stage RISC-V CPU specifically targetting FPGA implementations.
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Eclipse/FreeRTOS/core-v-mcu example program
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RTL sources of the High-Performance L1 Dcache (HPDcache) for OpenHW CV cores
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OpenHW Group / backup-20240421 / force-riscv
Apache License 2.0Instruction Set Generator initially contributed by Futurewei
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OpenHW Group / backup-20240421 / openhwgroup.org
Eclipse Public License 2.0OpenHW Group is a not-for-profit, global organization driven by its members and individual contributors where hardware and software designers collaborate in the development of open-source cores, related IP, tools and software. OpenHW provides an infrastructure for hosting high quality open-source HW developments in line with industry best practices.
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Documentation for the OpenHW Group's set of CORE-V RISC-V cores
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RISC-V eXtension interface that provides a generalized framework suitable to implement custom coprocessors and ISA extensions
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CORE-V Wally is a configurable RISC-V Processor associated with RISC-V System-on-Chip Design textbook. Contains a 5-stage pipeline, support for A, B, C, D, F, M and Q extensions, and optional caches, BP, FPU, VM/MMU, AHB, RAMs, and peripherals.
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OpenHW Group / backup-20240421 / cv32e40s
Apache License 2.04 stage, in-order, secure RISC-V core based on the CV32E40P
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OpenHW Group / backup-20240421 / cv32e40p
Apache License 2.0CV32E40P is an in-order 4-stage RISC-V RV32IMFCXpulp CPU based on RI5CY from PULP-Platform
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OpenHW Group / backup-20240421 / cva6
Apache License 2.0The CORE-V CVA6 is an Application class 6-stage RISC-V CPU capable of booting Linux
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Functional verification project for the CORE-V family of RISC-V cores.
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Eclipse Foundation / IT / Websites / blogs.eclipse.org
Eclipse Public License 2.0A website that enables Foundation staff to blog on our domain.
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Eclipse Foundation / IT / Websites / marketplace.eclipse.org
Eclipse Public License 2.0Updated -
Eclipse Projects / aidge / aidge_backend_cpu
Eclipse Public License 2.0Aidge's reference CPU backend, written in C++, not optimized for performances
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