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The CORE-V CVA5 is an Application class 5-stage RISC-V CPU specifically targetting FPGA implementations.

Aidge's quantization module, for both PTQ and QAT, written in C++

The Eclipse sim@openPASS platform mainly consists of a GUI and a simulation core interacting with openPASS modules as well as external programs for post-processing. https://projects.eclipse.org/projects/technology.simopenpass

GT-Gen Core library which accepts ScenarioEngine, Environment and simulation parameters and enables the integrator to execute the simulation.

Aidge's core module, written in C++, always required

Oniro Project

Oniro Project Security updates

Papyrus for Robotics

Aidge's CUDA backend, written in C++/CUDA and using NVidia's CuDNN and CuBLAS libraries. Required for training and inference on NVidia's GPUs

GT-Gen Core library which accepts ScenarioEngine, Environment and simulation parameters and enables the integrator to execute the simulation.

https://git.seco.com/pub/i.mx/yocto/5.x/meta-seco-imx

Titan ProtocolModules FrameRelay

Titan Libraries TCCUsefulFunctions