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Read-only wrapper library for OSI (ASAM Open Simulation Interface) to provide easy access to data even in aggregated form

The Eclipse sim@openPASS platform mainly consists of a GUI and a simulation core interacting with openPASS modules as well as external programs for post-processing. https://projects.eclipse.org/projects/technology.simopenpass

EDDIE: enable intelligence in Oniro

Instruction Set Generator initially contributed by Futurewei

The CORE-V CVA5 is an Application class 5-stage RISC-V CPU specifically targetting FPGA implementations.

RTL sources of the High-Performance L1 Dcache (HPDcache) for OpenHW CV cores

OpenEmbedded layer for building OpenHarmony images and components.

NOTE: THIS REPO HAS BEEN DEPRECATED. MOVING INTO https://gitlab.eclipse.org/eclipse/oniro-core/eddie

3rd party: fork of https://gitlab.com/Linaro/trustedsubstrate/meta-ledge-secure

3rd party: fork of https://gitlab.com/Linaro/trustedsubstrate/meta-ts

3rd party: Fork of https://git.yoctoproject.org/linux-yocto

Aidge's CUDA backend, written in C++/CUDA and using NVidia's CuDNN and CuBLAS libraries. Required for training and inference on NVidia's GPUs

Aidge's reference CPU backend, written in C++, not optimized for performances

Aidge's core module, written in C++, always required

Mocking SetDateTime in MockEnvironment