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Draft: #382 (take 2) Make plcgen0 accessible in ESCET.

Albert Hofkamp requested to merge 382-add-plcgen0 into develop

Making previous art available for testing and reference.

This branch should not be merged.

An improved version is being created in #397 (closed).

Restrictions:

        // 1.  no external functions
        // 2.  no tau events
        // 3.  no types: Set, Func, CompParamWrap, CompInstWrap, ComponentDef, Dist, Dict, Void.
        // 4.  no automaton reference (or self) child isn't allowed
        // 5.  no exprs: slice, tau, event, set, time, self, component, compParamWrap, compInstWrap, dict
        // 6.  no urgent locations/edges
        // 7.  must have trivially true initial location and expressions.
        // 8.  no empty lists/arrays
        // 9.  no variable length lists
        // 10. no continue function statement (from FuncGen.java:186, even though funcs are not allowed)
        // 11. no function parameter names that are are keywords, including EN and ENO. (from renameNames:393)
        // 12. no string projection
        // 13. no multiple initial values
        // 14. no stdLibFuncs: ACOSH ASINH ATANH BERNOULLI BETA BINOMIAL CEIL CONSTANT COSH DELETE EMPTY ERLANG EXPONENTIAL FLOOR FORMAT GAMMA GEOMETRIC LOG_NORMAL NORMAL POISSON POP RANDOM ROUND SCALE SIGN SINH SIZE TANH TRIANGLE UNIFORM WEIBULL
        // 15. no unary expression SAMPLE
        // 16. no binary expression ELEMENT_OF SUBSET
        // 17. no internal functions with cyclic dependencies (there should not be functions)
        // 18. no an event must have at least one non-monitoring automaton. (-> finite response)
        // 19. no list/array of empty tuples
        // 20. no constants may not use functions (both internal and stdlib).

CIF code that will cause crashes/incorrect PLC code:

- Using tuples in updates creates incorrect PLC code, eg "edge a do x:=(1,2);"
- Events that are declared within an automaton but not used anywhere result in an AssertionError.
- Multi-assignments result in a java.lang.NullPointerException. eg "edge a do (x,y) := (y,x);"

Using the generator:

  • Make an empty IO table named empty.csv.
  • Make a .tooldef file with the following text:
// Defines the 'plcgen0 tool.
tool int plcgen0(list string args = [], string stdin = "-", string stdout = "-", string stderr = "-",
                bool appendOut = false, bool appendErr = false, bool errToOut = false, bool ignoreNonZeroExitCode = false):
    return app("org.eclipse.escet.cif.plcgen0", "org.eclipse.escet.cif.plcgen0.app.PlcGen2App", args, stdin, stdout, stderr,
               appendOut, appendErr, errToOut, ignoreNonZeroExitCode);
end

// Run the plcgen0 program.
// - Replace "abb" by "siemens-7-1500" to get siemens output, (Other targets will likely fail.)
// - Replace "model.cif" by the name of the cif model to convert,
// - stdout and stderr settings may be added to get the output at the console.

plcgen0(["--io-table-name=empty.csv", "--target-type=abb", "model.cif"]);
// With output redirection: plcgen0(["--io-table-name=empty.csv", "--target-type=abb", "model.cif"], stdout="out_file", stderr="err_file");

// For a non-empty IO table, the following fields are required for each line in the .CSV file:
// - PLC address,
// - PLC typename,
// - Full path to CIF input-variable or output location/disc-variable/alg-variable
//
// For example for "input bool input1" and "alg bool output1 = ..." in the root of the specification, the following is accepted.
// %I1,BOOLEAN,input1
// %Q2,BOOLEAN,output1
  • Adjust the plcgen0 line to your liking, plcgen0(["-h"]); will dump the accepted options.
Edited by Albert Hofkamp

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