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Commit 552925fe authored by Cyril Moineau's avatar Cyril Moineau
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Fix Slice and Concat code generation + Add inputs as const.

parent 98cb46ab
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void aidge_slice_float32 (float* inputs,
float* outputs,
int* axes,
int* starts,
int* ends,
const int* axes,
const int* starts,
const int* ends,
unsigned int input_dims,
unsigned int nb_axes)
{
......
{#- For name header -#}
#ifndef {{ name|upper }}_LAYER_H
#define {{ name|upper }}_LAYER_H
/* ElemWise - {{ elemwise_op }} layer */
{# For layer configuration -#}
#define {{ name|upper }}_INPUTS_SIZE {{ in_size[0] }}
#define {{ name|upper }}_OUTPUTS_SIZE {{ out_size[0] }}
#define {{ in_name[0]|upper }}_DIMS {{ in_dims[0] }}
#define {{ in_name[1]|upper }}_DIMS {{ in_dims[1] }}
#define {{ out_name[0]|upper }}_DIMS {{ out_dims[0] }}
#define {{in_name[0]|upper}}_NB_DIM {{ in_dims[0]|length}}
#define {{in_name[1]|upper}}_NB_DIM {{ in_dims[1]|length}}
#define {{out_name[0]|upper}}_NB_DIM {{ out_dims[0]|length}}
#endif /* {{ name|upper }}_LAYER_H */
......@@ -3,6 +3,7 @@
#define {{ name|upper }}_LAYER_H
/* Slice layer */
{% include "./_meminfo.jinja" %}
{# For layer configuration -#}
#define {{ name|upper }}_NB_CHANNELS {{ nb_in }}
......
{% if not is_output %}
{{out_cdtype[0]}}* {{out_name[0]}} = ({{out_cdtype[0]}}*) mem + {{out_name[0]|upper}}_OFFSET;
{% endif %}
aidge_concat{{ nb_in }}_float32 (
{{name|upper}}_AXIS,
{%- for i in range(nb_in) -%}
{{ in_name[i]|upper }}, {{ name|upper }}_INPUT_{{i}}_SIZE,
{{ in_name[i]}}, {{ name|upper }}_INPUT_{{i}}_SIZE,
{%- endfor -%}
{{ out_name[0]|upper }});
{{ out_name[0] }});
{% if not is_output %}
{{out_cdtype[0]}}* {{out_name[0]}} = ({{out_cdtype[0]}}*) mem + {{out_name[0]|upper}}_OFFSET;
{% endif %}
aidge_slice_float32 ({{in_name[0]}}, {{out_name[0]}}, {{name|upper}}_AXES, {{name|upper}}_STARTS, {{name|upper}}_ENDS, {{name|upper}}_NB_AXES, {{name|upper}}_NB_CHANNELS);
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