Proposal to add DM

Hi @jm4rtin, @davideschiavone, @zarubaf, @Silabs-ArjanB, @jquevremont and @DBees. This pull-request is in direct response to a conversation in openhwgroup/core-v-verif#65:

With respect to Debug there is a 'v013.2 Debug Compliance test' that I think would be very valuable to add to core-v-verif. It requires the instantiation of the Debug Module inside the core-v-verif testbench and it will then do a (basic) compliance check of the combination of the RISC-V core and the Debug Module. Maybe this is beyond the scope of the RTL freeze target, but if so, then I would really appreciate if this can be added afterwards as it represents actual usage scenarios of the debug system.

I support this notion, but as a Debug Module is explicitly beyond the scope of CV32E40P, there are no plans to integrate a DM into the testbench and run the 'v013.2 Debug Compliance test'.

The purpose of this pull-request is to re-open that discussion for CV32E40P v2. I support the notion of defining a "CORE-V Debug Module" that supports all CORE-V cores, not just CV32E4. However, such a DM would need a first core to use it, so I further propose that the CV32E40P v2 be that core.

Signed-off-by: Mike Thompson mike@openhwgroup.org