RISCVDV bringup - Coverage Collection on RISCVISACOV
Created by: quswarabid
The purpose of this PR is to collect and merge coverage on a test regression (tests generated from RISCVDV while coverpoints from RISCVISACOV)
After updating your local .bashrc file*, and updating to this branch. Run $time** make collect_riscvdv_regression_coverage and expect output similar to below:
*See README.md
**optional: time
$ time make collect_riscvdv_regression_coverage
rm sim/riscv.ucdb regression.log covhtmlreport/ regression_logs/ regression_ucdbs/ -rf
mkdir -p regression_logs
mkdir -p regression_ucdbs
cd regression_logs && rm -rf *
cd regression_ucdbs && rm -rf *
make rvdv test_name=riscv_arithmetic_basic_test >> regression.log 2>&1
make rvdv test_name=riscv_amo_test >> regression.log 2>&1
make rvdv test_name=riscv_ebreak_debug_mode_test >> regression.log 2>&1
make rvdv test_name=riscv_ebreak_test >> regression.log 2>&1
make rvdv test_name=riscv_floating_point_arithmetic_test >> regression.log 2>&1
make rvdv test_name=riscv_floating_point_mmu_stress_test >> regression.log 2>&1
make rvdv test_name=riscv_floating_point_rand_test >> regression.log 2>&1
make rvdv test_name=riscv_full_interrupt_test >> regression.log 2>&1
make rvdv test_name=riscv_hint_instr_test >> regression.log 2>&1
make rvdv test_name=riscv_illegal_instr_test >> regression.log 2>&1
make rvdv test_name=riscv_invalid_csr_test >> regression.log 2>&1
make rvdv test_name=riscv_jump_stress_test >> regression.log 2>&1
make rvdv test_name=riscv_loop_test >> regression.log 2>&1
make rvdv test_name=riscv_machine_mode_rand_test >> regression.log 2>&1
make rvdv test_name=riscv_mmu_stress_test >> regression.log 2>&1
make rvdv test_name=riscv_no_fence_test >> regression.log 2>&1
make rvdv test_name=riscv_non_compressed_instr_test >> regression.log 2>&1
make rvdv test_name=riscv_pmp_test >> regression.log 2>&1
make rvdv test_name=riscv_privileged_mode_rand_test >> regression.log 2>&1
make rvdv test_name=riscv_rand_instr_test >> regression.log 2>&1
make rvdv test_name=riscv_rand_jump_test >> regression.log 2>&1
make rvdv test_name=riscv_sfence_exception_test >> regression.log 2>&1
make rvdv test_name=riscv_unaligned_load_store_test >> regression.log 2>&1
mkdir -p regcov
cd regcov && rm -rf *
vcover merge regcov/regcov.ucdb regression_ucdbs/* -suppress 6854 -64
QuestaSim-64 vcover 2023.4 Coverage Utility 2023.10 Oct 9 2023
Start time: 16:50:01 on Apr 23,2024
vcover merge regcov/regcov.ucdb regression_ucdbs/riscv_amo_test.ucdb regression_ucdbs/riscv_arithmetic_basic_test.ucdb regression_ucdbs/riscv_ebreak_debug_mode_test.ucdb regression_ucdbs/riscv_ebreak_test.ucdb regression_ucdbs/riscv_floating_point_arithmetic_test.ucdb regression_ucdbs/riscv_floating_point_mmu_stress_test.ucdb regression_ucdbs/riscv_floating_point_rand_test.ucdb regression_ucdbs/riscv_full_interrupt_test.ucdb regression_ucdbs/riscv_hint_instr_test.ucdb regression_ucdbs/riscv_illegal_instr_test.ucdb regression_ucdbs/riscv_invalid_csr_test.ucdb regression_ucdbs/riscv_jump_stress_test.ucdb regression_ucdbs/riscv_loop_test.ucdb regression_ucdbs/riscv_machine_mode_rand_test.ucdb regression_ucdbs/riscv_mmu_stress_test.ucdb regression_ucdbs/riscv_no_fence_test.ucdb regression_ucdbs/riscv_non_compressed_instr_test.ucdb regression_ucdbs/riscv_pmp_test.ucdb regression_ucdbs/riscv_privileged_mode_rand_test.ucdb regression_ucdbs/riscv_rand_instr_test.ucdb regression_ucdbs/riscv_rand_jump_test.ucdb regression_ucdbs/riscv_sfence_exception_test.ucdb regression_ucdbs/riscv_unaligned_load_store_test.ucdb -suppress 6854 -64
QuestaSim-64 vcover 2023.4 Coverage Utility 2023.10 Oct 9 2023
Merging file regression_ucdbs/riscv_amo_test.ucdb
Merging file regression_ucdbs/riscv_arithmetic_basic_test.ucdb
Merging file regression_ucdbs/riscv_ebreak_debug_mode_test.ucdb
Merging file regression_ucdbs/riscv_ebreak_test.ucdb
Merging file regression_ucdbs/riscv_floating_point_arithmetic_test.ucdb
Merging file regression_ucdbs/riscv_floating_point_mmu_stress_test.ucdb
Merging file regression_ucdbs/riscv_floating_point_rand_test.ucdb
Merging file regression_ucdbs/riscv_full_interrupt_test.ucdb
Merging file regression_ucdbs/riscv_hint_instr_test.ucdb
Merging file regression_ucdbs/riscv_illegal_instr_test.ucdb
Merging file regression_ucdbs/riscv_invalid_csr_test.ucdb
Merging file regression_ucdbs/riscv_jump_stress_test.ucdb
Merging file regression_ucdbs/riscv_loop_test.ucdb
Merging file regression_ucdbs/riscv_machine_mode_rand_test.ucdb
Merging file regression_ucdbs/riscv_mmu_stress_test.ucdb
Merging file regression_ucdbs/riscv_no_fence_test.ucdb
Merging file regression_ucdbs/riscv_non_compressed_instr_test.ucdb
Merging file regression_ucdbs/riscv_pmp_test.ucdb
Merging file regression_ucdbs/riscv_privileged_mode_rand_test.ucdb
Merging file regression_ucdbs/riscv_rand_instr_test.ucdb
Merging file regression_ucdbs/riscv_rand_jump_test.ucdb
Merging file regression_ucdbs/riscv_sfence_exception_test.ucdb
Merging file regression_ucdbs/riscv_unaligned_load_store_test.ucdb
Writing merged result to regcov/regcov.ucdb
End time: 16:50:01 on Apr 23,2024, Elapsed time: 0:00:00
Errors: 0, Warnings: 0
vcover report -details -html regcov/regcov.ucdb
QuestaSim-64 vcover 2023.4 Coverage Utility 2023.10 Oct 9 2023
Start time: 16:50:01 on Apr 23,2024
vcover report -details -html regcov/regcov.ucdb
End time: 16:50:01 on Apr 23,2024, Elapsed time: 0:00:00
Errors: 0, Warnings: 0
vcover report regcov/regcov.ucdb -details -cvg > regcov/regcov.ucdb.log
vcover report regcov/regcov.ucdb -testdetails -cvg > regcov/regcov.ucdb.testdetails.log
vcover report regcov/regcov.ucdb -details -cvg -below 100 | egrep "Coverpoint|Covergroup|Cross" | grep -v Metric > regcov/regcov.ucdb.summary.log
grep "Total Coverage By Instance" regcov/regcov.ucdb.log
Total Coverage By Instance (filtered view): 46.78%
real 5m37.079s
user 5m12.155s
sys 1m14.281sThe PR is a little too crude for what it achieves. Subsequent updates will be contributed in new PRs.