Added clarificaiton to buildroot linux testvector generation

Created by: rosethompson

• Renamed controllerinputstage to controllerinput to match book.
• Updated GPIO signal names to reflect book.
• Updated fpga constraints to remove critical warning.
• Modified plic and uart to remove async reset. This removes vivado critical warning.
• Started constrains file for arty a7 fpga.
• Added buildroot instructions back to readme. moved these instructions to the docs directory.
• Added some additional details about the buildroot install.