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Flist.cv64a6_imafdc_sv39_gate, update LIB_VERILOG path

Eclipse Webmaster requested to merge github/fork/yanicasa/pr_flistgate into master

Created by: yanicasa

Modification on the flist gate "Flist.cv64a6_imafdc_sv39_gate" to clean post synthesis simulation jobs. Most of the time the tech files are in a fixed path on the server and not relative to the project. With the current prefix this forced us to do a workaround.

Already validated in test branch "feature/gitlab-ci" see : #798

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