Flist.cv64a6_imafdc_sv39_gate: Flist dedicated to gate simulation
Created by: JeanRochCoulon
Move Flist dedicated to the gate simulation from core-v-verif to cva6 repository. LIB_VERILOG need to point to the verilog foundry library
Created by: JeanRochCoulon
Move Flist dedicated to the gate simulation from core-v-verif to cva6 repository. LIB_VERILOG need to point to the verilog foundry library
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