Stand-alone manifest for CVA6

Please do not merge this (yet).

The primary purpose of this pull-request is to review cva6_manifest.flist, a stand-alone manifest for the CVA6 core (without any of the external TB or FPGA components). This manifest is currently used in core-v-verif (see core-v-verif #451), so I am at least 90% confident that is it correct and complete.

Ultimately this manifest should be in a better form such as a YAML structure, but let's focus on content first. I have three specific comments/questions:

1. Is the list of files in the manifest complete?
2. The RTL should not be dependent on a file in the tb directory. So tb/ariane_soc_pkg.sv will need to find another home, or the RTL-specific content could be extracted and moved to a file in another directory.
3. The core RTL should not be dependent on an FPGA-specific module. This affects src/fpga-support/rtl/SyncSpRamBeNx64.sv.

The other changes in this pull-request exist to support Metrics dsim. I am still working through some of this and will open specific issues and/or pull-requests on this later.