Ariane Benderization (2)
Created by: WRoenninger
Part 2 of #388. This is reabsed onto the current master and #392. Probably best is to this this first onto a branch with the changes form #392.
This PR introduces bender for dependency management of Ariane. Additionally the AXI SoC infrastructure has been updated.
- Git submodules have been removed and the sources placed into the folder deps by bender. Most of the dependencies have been updated, see CHANGELOG. Notably the AXI infrastructure has been revamped.
- The Makefile has been adapted to use the compilation scripts generated by bender for FPGA and Vsim.
- Verilator simulation gets compiled by parsing scripts/sources.json in the Makefile through a python3 script in scripts/parse_bender_verilator.py.
- Peripherals module is now the same for FPGA and Testharness (src/fpga/peripherals_xilinx.sv). In the Testharness it is configured to not use any Xilinx IPs and answers with salve errors on the AXI.
- Note / Todos:
- AXI has still to be updated to a release tag, as the dwc is not officially released jet.
- README has to be updated.