Add conditional Rocket Chip traceport to top-level

Created by: abejgonzalez

This is part of the broader work being done to integrate Ariane into Chipyard (see https://github.com/ucb-bar/chipyard/pull/448).

Add a trace port to the top-level Ariane IOs. This matches the format given by https://github.com/chipsalliance/rocket-chip/blob/5e506e3923c6935502b3d80afb57e329609cb326/src/main/scala/rocket/CSR.scala#L163-L172. This allows Ariane to hook up to FireSim's TracerV interface (https://docs.fires.im/en/dev/Advanced-Usage/Debugging-and-Profiling-on-FPGA/TracerV.html).

Any comments or feedback would be greatly appreciated!