Fix #37

Created by: suehtamacv

This should fix #37 (closed). I restarted the cache_ctrl FSM back to IDLE and acknowledged the request after a kill_req_i is received, no matter what state the FSM is in.

I also wrote an SVA property in the scoreboard that would catch the specific case where two functional units write the scoreboard at the same time and with the same transaction id. However, if the spurious write happened not at the same cycle, but after the correct one, the property would not be violated and the architectural state would be corrupted.