Add support for Xilinx Kintex-7 FPGA KC705 Evaluation Kit

Created by: Steinegger

This PR adds support for the Xilinx Kintex-7 FPGA KC705 Evaluation Kit.

The main changes are the additional constraints file, the configuration for the KC705's DDR3 memory and the differently sized interface with a reduced number of LEDs and switches to accommodate the KC705's peripheral.

The fpga/src/kc705.svh and fpga/src/genesysii.svh have an additional define KINTEX7 to be used for parts of the code used for both the Genesys II and the KC705 and other boards of the family. This define is then also used in the ariane-ethernet repo (separate PR).

The fpga/xilinx/xlnx_mig_7_ddr3/tcl/run.tcl is using the short version of the board name to determine the config file used for the DDR memory, allowing for more boards to be added in the future using the same method.