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[riscv-config] Update PMP definitions in cv32q65x spec

Created by: zchamski

Align the specification of the PMPADDRn and PMPCFGn registers of CV32A65X on current design:

  • all 64 PMP entries are accessible
  • only 8 lowest-numbered entries are modifiable
  • PMP entries 8 through 63 are read-only zero.
  • bits 6:4 of lowest 8 PMPnCFG fields (located in PMPCFG0 and PMPCFG1) are read-only zero.

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