[Xcelium flow] Xrun compile fixes (!2389) · Merge requests · OpenHW Group / backup-20241120 / cva6

Created by: CoralieAllioux

This PR provides several fixes that allow Xcelium Cadence simulator to compile.

It provided the followings fixes:

init_val data_type in sram
size of scoreboard parameter for trace: at run time, not enough memory is dedicated (get trace output clean)
init hpdcache config in parameter type

Nevertheless, this PR is not enough to launch cva6.py with xrun-uvm or xrun-testharness DV_SIMULATOR. Further PRs will follow.

[Xcelium flow] Xrun compile fixes