Update riscv-config infra to better match expressivity needs of CV32A65X.

Created by: zchamski

• Enable 'B' extension if Zba, Zbb and Zbs are all present.
• Add misa.ube bit description to ISA schema (rv32 and rv64).
• Update spec Makefile to remove intermediate files and logs.
• Add 'read-only constant 0' alternative for mtval.
• Add corresponding riscv-config vendor patches.