Remove all logic and sequential related to RVFI in CORE cva6

Created by: yanicasa

Support for post-synthesis RVFI tracer without impacting the number of gates

• remove logic in the scoreboard, in the lsu and at the top
• creation of a module to build rvfi_probes structure with all the internal signals used to build the rvfi_instr structure, This module is instantiated at top cva6
• creation of a module which builds rvfi_instr. This module is instantiated in all supported testbenches

Breaking change: rvfi_o port removed, rvfi_probes_o added. Can be left open as before if you don't need tracer_rvfi