Updated user manual to address several configuration (second pass)
Created by: jquevremont
This PR is in addition to the "first pass" (PR https://github.com/openhwgroup/cva6/pull/1685).
It includes:
- Minor update of Core_Integration.rst (looking for contributors)
- Applicability of CSR_Performance_Counters to configurations
- RISCV_Instructions.rst split into as many files as RISC-V extensions with their applicability to configurations (to ease the future generation of user manuals dedicated to each configuration).
What will need updates after first and second passes are merged:
- PMP.rst (when their presence/absence in CV32E6?X is confirmed)
- Traps_Interrupts_Exceptions.rst: expected significant impact of machine-only CV32E6?X (will need a contribution from
@JeanRochCoulon
's team)