ADD SUPPORT FOR `Zcb` EXTENSION (from Code Size Reduction, Zce)

Created by: Abdulwadoodd

This PR resolves #1366 (closed)

Description

This PR adds the support zcb extension which is one of the sub-extension recently ratified Code Size Reduction (Zce) extension. This extension adds compressed ops for following instructions. All the zcb instructions require the support of at least standard C extension as a pre-requisite in addition to base (I-type) Instructions:

Instructions fall in Quadrant 0:

c.lbu, c.lh, c.lhu, c.sb, c.sh

Instructions fall in Quadrant 1:

c.mul (M extension is pre-requisite) c.zext.b c.sext.b (Bitmanip is pre-requisite) c.zext.h (Bitmanip is pre-requisite) c.sext.h (Bitmanip is pre-requisite) c.zext.w (Bitmanip is pre-requisite) c.not

Design Changes

1. The Compressed Decoder is updated to produce the corresponding 32-bit instructions.
2. CVA6ConfigZcbExtEn parameter is added to config files.
3. RZCB parameter is added for the RTL.
4. zcb is enabled for three configs: cv32a6_embedded, cv32a60x and cv64a6_imafdc_sv39. (bitmanip is also enabled for cv32a60x)

Verification

Architecture tests for zcb instructions are available in the PR of riscv-arch-test. These tests are run under core-v-verif environment for three configs of cva6 mentioned above and the tests are passing. The artifacts collected after running the tests for all three configs are available in G-drive.