Add Design Documentation of MMU SV32
Created by: YazanHussnain-10x
This Pull Request adds the design documentation for MMU SV32 and resolve this issue openhwgroup/cva6#1393, covering several critical modules. The following modules are documented within this pull request:
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MMU SV32: This section provides an in-depth overview of the MMU SV32 module.
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Translation Lookaside Buffer (TLB): This part of the documentation delves into the details of the TLB module.
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Shared TLB: The documentation further extends to cover the Shared TLB module, explaining how it works and its features.
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Page Table Walker (PTW): The PTW module is thoroughly explored in this documentation, shedding light on its functionality and design.
Within each of these modules, various sections are covered, ensuring a comprehensive understanding of their operation. Here's a breakdown of the sections for each module:
MMU SV32:
- Introduction
- Signal Description of MMU SV32
- Struct Description
- Control Flow
- Instruction Fetch Interface
- Data Interface
TLB:
- Introduction
- Signal Description of TLB
- Struct Description
- TLB Entry Fields
- TLB Implementation in CVA6
- TLB Lookup
- Update and Flush
- Replacement Policy
Shared TLB:
- *Introduction
- Signal Description of Shared TLB
- Struct Description
- Shared TLB Entry Fields
- Shared TLB Implementation in CVA6
- Shared TLB Lookup
- Update and Flush
- Replacement Policies
PTW:
- Introduction
- Signal Description of PTW
- Struct Description
- PTW State Machine
- All States
- Flush Scenario