Add Direct D$ Access to `acc_dipsatcher`

Created by: domenicw

This PR adds D$ access to the acc_dispatcher. For this, both caches (WT and STD) are adapted to handle a fourth D$ request port. This fourth port is used for issuing loads. Stores will go over the existing store request port. It is shared with the store_buffer, though the store_buffer always has priority access over the acc_dispatcher.

This fourth port is useful for accelerators, that want to access the D$ directly. Eventually it is also needed for the correct implementation of the CV-X-IF, which also has an interface into the memory. So this PR is a precursor to the future work needed for the correct CV-X-IF implementation.