Add parameter to define the width of the memory transaction ID (!1124) · Merge requests · OpenHW Group / backup-20241120 / cva6

Eclipse Webmaster requested to merge github/fork/cfuguet/cfuguet_set_memory_tid_width_on_cfg into master Mar 17, 2023

Created by: cfuguet

This new parameter in the CVA6 configuration packages defines the width of the transaction ID between the I/Dcaches and the interconnection interface.

It should be defined in global CVA6 packages and not in any specific implementation of a cache to ease the integration of different cache subsystems.

Add parameter to define the width of the memory transaction ID

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