add btb optimized for FPGA targets
Created by: sjthales
Hello @JeanRochCoulon
@zarubaf
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BTB module adapted for FPGA targets, predictable adresses are stored in BRAM for FPGA and in D flip-flops for ASIC Targets.
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Flushing is not supported for FPGA.
I re-submit a PR to resolve conflicts due to latest modifications these last days.
Can this PR be merged quickly to avoid possible conflicts?