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Use unique Flist for testharness and UVM

Created by: JeanRochCoulon

Modification has been verified for VCS (Synopsys) simulation, Verilator simulation and FPGA build.

Modifications have been also done for XRUN and Questa, but without verification because I do not own this type of licence. @MikeOpenHWGroup do you know someone able to try to simulate with such tools ?

Merge request reports

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