Skip to content

Fix for issue #398.

Created by: silabs-oysteink

Three instructions could be retired between a bus error and the taken NMI. Fixed RTL to halt ID stage earlier, and updated the associated assertion to take into account that bus errors for bufferable writes may come between instructions.

Signed-off-by: Oystein Knauserud Oystein.Knauserud@silabs.com

Merge request reports

Loading