Minstret updates to make clean ci_check

Created by: silabs-oysteink

Rewrote performance counters to have proper write enable and next_value. (For use in RVFI)

Added support for minstret. Notethat this uses wb_valid which factors in data_rvalid_i. Added stall in EX if minstret is READ in EX and any instruction is valid in WB. Updated RVFI to include dret pc in WB model and not updating EX pc in case of misaligned LSU.

ci_check is clean with one warning during debug_test (comes from verif, not RTL)

Synthesis shows around 450 gates increase compared to last hash. This is probably due to using wb_valid in counting retired instructions.

Signed-off-by: Oystein Knauserud Oystein.Knauserud@silabs.com