rvfi_trap not correct for single step instructions
Created by: silabs-oysteink
Bug Title
rvfi_trap not correct for single step instructions
Component
Component:RTL: RVFI
Steps to Reproduce
The steps provided in issue #340 (closed) can be used for this issue as well. Any single stepped instruction in the test seems to exhibit this behavior:
The single step instruction reaches WB and generates a wb_valid, which leads to rvfi_valid with no bits set in rvfi_trap. rvfi_trap_next can be seen to have some bits set at the same time as rvfi_valid is high (marked in blue in the figure), but these does not seem to correspond to the user manual description of rvfi_trap.
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