Merge from E40X

Created by: silabs-oysteink

SEC clean when SMCLIC=0

When SMCLIC=1, SEC is not clean due to instruction side bus errors being treated differently (exception vs NMI). When SMCLIC=1 and assuming instr_err_i=0, we get a counterexample when the MPU blocks a transfer (old version used LSU exception codes, new code uses instruction side error codes).