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RVFI - Adding valid bit to mem req id

Eclipse Webmaster requested to merge github/fork/YoannPruvost/dev_rvfi_lw into dev

Created by: YoannPruvost

When to consecutive load writes to the same dest register, we need to accurately catch the written data. Here when we had a load halfword, the first write was sign extended and the second write was unsigned. The unsigned data is also written to the register file since a load to this register is pending. This is mainly a verification scenario

To avoid this issue, I added a valid bit to the mem req id used to match a load data response to the correct load instruction

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