Use cv32e40p_wrapper to bind in RTL assertions.

Hi @Silabs-ArjanB and @davideschiavone, this is a demonstration of how we can use the new cv32e40p_wrapper to bind in "designer assertions" into the RTL. This was discussed in the OpenHW: Extracting assertions from the RTL email thread.

This demo moves the assertions in cv32e40p_prefetch_controller module up to the wrapper. Once we settle on an implementation it will be straightforward to move the remaining assertions.

There are some minimal updates required to the verification environment to support this. If you clone the regression_test branch of https://github.com/MikeOpenHWGroup/core-v-verif, you can run "make sanity" and see it in action.