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Extend core tb to support atomics

Eclipse Webmaster requested to merge tb-amo into master

Created by: bluewww

Features

  • Enable riscv-tests's rv32ua
  • Disable lrsc test (not implemented)
  • Add atomic shim (amo_ infront of RAM model and wire up atop. Translate meaning of data_atop_i` to match the one from the shim
  • Patch write enable behavior in amo_shim.sv to work with RI5CY.

TODO

  • Support random stall generator (currently only verilator tested)

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