Fixed incorrect CORE-V hwlp masks

Created by: MaryBennett

gas/ChangeLog.COREV:

* config/tc-riscv.c: Fixed issue arising from incorrect CORE-V
    hardware loop masks and added support for xcorevhwlp.

include/ChangeLog.COREV:

* opcode/riscv-opc.h: Fixed incorrect masks for CORE-V hardware loop
    instructions.
* opcode/riscv.h: Added support for xcorevhwlp.

opcodes/ChangeLog.COREV:

* riscv-opc.c: Added support for corevhwlp.

Signed-off-by: Mary Bennett mary.bennett@embecosm.com