Strichmo/pr/embench cleanup

Created by: strichmo

Cleaning up embench speed benchmarks (size cleanup to follow). parallel sims work now to greatly reduce time added initial transaction log disable for testbench - greatly reduces simulation time for benchmarks, but needs a more comprehensive solution added timeout to embench moved coremark cflags into test yaml and removed special rules and variables in makefile Updated RTL to latest Uncommented lots of release check random tests that should pass now Commented the CSR test in release check in lieu of an OVPSIM fix required due to mcause extending by a bit (bus errors)