Fix dead-code

Hi @strichmo. You may recall that a new OpenHW member AMIQ EDA has a SystemVerilog/UVM lint tool called Verissimo that they are applying to core-v-verif. The purpose of this pull-request is to address a couple of trivial lint errors reported by Verissimo and to see if the tool automatically picks up the fix.

The changes in this PR do not impact any of the UVM environments.

Signed-off-by: Mike Thompson mike@openhwgroup.org