Initialize RTL instruction memory even when ISS not used

Hi Greg. You've probably forgotten, but back in May of this year you updated the dut_wrap module to initialize unused instruction memory which could lead to step-and-compare mismatches because the RTL and TB model 4-state values and the ISS models 2-state values.

In this PR I have slightly modified this code so that the RTL's instruction memory is always initialized, even if the ISS is not used. This resolves #263 (closed).

Signed-off-by: Mike Thompson mike@openhwgroup.org