Corrected a non-expected behavior due to PR2439 (!2453) · Merge requests · OpenHW Group / backup-20241120 / core-v-verif

Eclipse Webmaster requested to merge github/fork/XavierAubert/cv32e40p/fix_2439_PR_issue into cv32e40p/dev May 29, 2024

Created by: XavierAubert

In #2439, I introduced a fix to prevent all compressed-dedicated registers to be reserved for some streams, but I didn't pay attention that .sum() method for arrays is type-conservative, so it was always giving 0 or 1 in the constraints solver...

By luck, it solved the issue for the specific testcase I gave, but (of course...) the error came back for another testcase :

make gen_corev-dv TEST=corev_rand_instr_test CV_CORE=cv32e40p COREV=1 CFG=pulp_fpu_zfinx_1cyclat TEST_CFG_FILE=floating_pt_zfinx_instr_en,disable_all_trn_logs SIMULATOR=vsim SEED=784606021

(I hope) I solved this for good.

Corrected a non-expected behavior due to PR2439

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