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Support additional CVA6 custom CSRs via Spike extension.

Created by: zchamski

Introduce a new extension 'cv32a6embedded' which once loaded, adds a new ICACHE CSR (address 0x7c0) to the Spike model. The register is of masked type with only bit 0 being writable and a reset value of 0x1.

The CSR is instantiated in the reset() method of the extension class. This method must be called after registering the extension with each core, cf. changes in spike_main/spike.cc.

Changed files:

  • vendor/riscv/riscv-isa-sim/customext/customext.mk.in (customext_srcs): Add cv32a6embedded.cc.
  • vendor/riscv/riscv-isa-sim/customext/cv32a6embedded.cc: New.
  • vendor/riscv/riscv-isa-sim/riscv/cva6.h: Ditto.
  • vendor/riscv/riscv-isa-sim/riscv/cva6_base.cc: Ditto.
  • vendor/riscv/riscv-isa-sim/riscv/riscv.mk.in (riscv_install_hdrs): Add cva6.h. (riscv_srcs): Add cva6_base.cc.
  • vendor/riscv/riscv-isa-sim/spike_main/spike.cc (main): Reset each custom extn after registering it with a core.

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