Corrections and updates to CV32E40Pv2 simulation environment

Created by: XavierAubert

This PR adds many corrections and updates added by @dd-baoshan, @dd-vaibhavjain and I. Sorry for piling up so many commits, there was a lot of back-and-forth between the three of us as we progressed in implemeting TB features and solving bugs as we encountered them Below is a summary for each main topic

1. rmdb template (for Questa Vrun) & cv_regress

• Cleaned unused parameters for make command line and bug fixing (3cd8a15f, eb9a77fd)
• corev-dv compilation is done one time for each configuration, and never compiled again to save performance (9a9b5075 & cc0f2fb7)

2. Regression files

• typo fix (aafbd639 & fcddc8ea)
• simplified ci_check (e3032544) The regression was too long for a simple ci_check, only hello-world test is run with all configurations. Non-relevant tests have been removed to keep the essentials.
• Various additions (9fe4d9da,

3. Issue #2007 (closed) solved (60dcb276, 03fbb5f5, 523ac6f5)

4. HWLoop generation improved and implemented some fixes (Commits 201479dd, 1d474e8b, 4566b762)

5. FP stream coverage improved (2138c06a & 523ac6f5)

6. Updated configurations for riscof arch test to add FPU latency 91d6d75f & 9434db41

7. Default ISS usage has been set to no in various contexts as it requires a licence

• inside cv_regress (49ad67d2)
• inside riscof arch test (6048bff3)

8. Make usage of feature introduced in PR #2081 (FYI, implemented to solve #2007 (closed)) Commits 9e6cc345