cv32e40s ldgen bugfix

Created by: silabs-hfegran

• Fixed: Random tablejump sequence used hardcoded T0 register (Caused stack corruption)
• Fixed: linker script generator run standalone does not get the correct include-files and errs on uvm macro that does not exist
• Fixed: ldgen: Added support for configurations where not the entire memory map is writable
• Fixed: -nmagic flag added (prevents linker from embedding the elf header into the first program header segment) This caused a binary mismatch between the output of objcopy and the contents of the program headers in the elf. The ISS only parses the program headers to decide what ends up in memory (correct from a program loader point of view but does not make sense for an embedded bare metal target). Objcopy that creates the raw binary for the RTL only parses the section header, which does not include this part of the binary, and thus there is a mismatch when this region is read without first being written by the program.
• Fixed: Non-sensical debug region settings
• Fixed: Missing enablement of "random instruction for hint"-setting in cpuctrl
• Summary: Improved full regression test results from ~25/824 failures to ~4/824 failures